Senior FPGA Prototyping Engineer

🏢 K2 Space · all K2 Space jobs
📍 Remote · North America
💰 $120,000 - $225,000 / year
📅 Posted 2026-08-14 · via RemoteIO
🏷 FPGA,ASIC,Verilog,Python,Digital Systems
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The Role We are seeking a Senior FPGA & Silicon Bring-up Engineer to accelerate the development of next-generation communications ASICs. You will own FPGA prototyping, firmware enablement, first-silicon bring-up, and hardware validation, serving as the bridge between ASIC design, firmware, software, and system integration. This role spans the entire silicon lifecycle from pre-silicon FPGA platforms that enable early hardware/software integration to post-silicon debug, interface validation, and automated test infrastructure. Responsibilities - Develop FPGA-based prototypes to enable early ASIC integration, firmware development, and system validation. - Build hardware platforms that allow software and firmware teams to develop before first silicon. - Support first-silicon bring-up, debug, and functional validation. - Develop automated validation infrastructure for silicon characterization and regression testing. - Configure and validate digital interfaces including high-speed Ethernet SerDes, SPI, UART, GPIO, and other peripheral interfaces. - Develop FPGA-based traffic generators, protocol checkers, and test applications for interface validation. - Debug issues spanning RTL, firmware, software, FPGA prototypes, and silicon using simulation and laboratory instrumentation. - Collaborate closely with ASIC Design, Verification, Firmware, Software, Systems, and DFT teams to accelerate product development. Qualifications - BS or MS in Electrical Engineering, Computer Engineering, or related field. - 5+ years of FPGA development experience using Verilog/SystemVerilog and AMD/Xilinx FPGA tools. - Strong understanding of ASIC development and digital system architecture. - Experience with FPGA prototyping for ASIC development. - Experience with firmware/software enablement and hardware bring-up. - Strong hardware debugging skills using JTAG, oscilloscopes, logic analyzers, and protocol analyzers. - Proficiency with Python and scripting for automation and test infrastructure. Nice to Have - Experience with networking, communications, or satellite systems. - Experience with embedded processors (ARM or RISC-V). - Experience working with hard real-time embedded systems (bare-metal or RTOS). - Experience validating high-speed digital interfaces, including Ethernet and SerDes protocols, SPI, and UART. - Experience with silicon bring-up using JTAG, logic analyzers, and oscilloscopes. Compensation and Benefits: - Base salary range for this role is $120,000 – $225,000 + equity in the company - Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level - Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks Export Compliance As defined in the ITAR, “U.S. Persons” include U.S. citizens, lawful permanent residents (i.e., Green Card holders), and certain protected individuals (e.g., refugees/asylees, American Samoans). Please consult with a knowledgeable advisor if you are unsure whether you are a “U.S. Person.” The person hired for this role will have access to information and items controlled by U.S. export control regulations, including the export control regulations outlined in the International Traffic in Arms Regulation (ITAR). The person hired for this role must therefore either be a “U.S. person” as defined by  22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license. Equal Opportunity K2 Space is an Equal Opportunity Employer; employment with K2 Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

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