Coherency Verification Engineer

๐Ÿข TechBiz Global ยท all TechBiz Global jobs
๐Ÿ“ Australia,Canada,Germany,India,United Kingdom,United States
๐Ÿ“… Posted 2026-07-03 ยท via Himalayas
๐Ÿท Hardware-Verification-Engineering,RTL-Verification,SoC-Verification,Verification-Engineering,Semiconductor-Engineering,Senior-Verification-Engineer,Design-Verification-Engineer,Verification-And-Validation-Engineer
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At TechBiz Global , we are providing recruitment service to our TOP clients from our portfolio. We are currently seeking a Coherency Verification Engineer to join one of our clients ' teams. If you're looking for an exciting opportunity to grow in a innovative environment, this could be the perfect fit for you.
Responsibilities:

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Verify complex digital designs at RTL level according to architecture and design specifications.

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Develop and maintain verification environments using SystemVerilog and UVM.

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Create, execute, and debug test plans for block-level, subsystem-level, and top-level verification.

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Work on the verification of coherent systems, including cache-related functionality and interconnect behavior.

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Validate designs involving CHI protocol, cache structures, coherency mechanisms, and system-level interactions.

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Run and manage simulations, regressions, and debug failures using industry-standard verification tools.

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Apply both formal and dynamic verification methodologies to identify design issues early.

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Use scripting languages such as Python, Perl, Bash, or TCL to automate verification flows and regression processes.

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Collaborate closely with architecture, design, and verification teams to analyze specifications, clarify requirements, and resolve issues.

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Track, document, and communicate verification progress, bugs, coverage status, and technical risks.

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Contribute to continuous improvement of verification methodology, tools, and best practices.

Requirements

- Master or PhD

- English C1

- Industrial experience +8 years

- Proficiency in SystemVerilog and UVM

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Knowledge of scripting languages (Python, Perl, Bash, TCL) and regression tools

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Experience with simulation and simulation tools

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Knowledge of revision control methodology and tools (git, svn)

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Experience in block level and sub-system or top level verification

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Experience with formal and dynamic verification

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Strong problem-solving skills and attention to detail

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Excellent communication and teamwork abilities

- Knowledge of the CHI protocol

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Understanding of caches' structure and parameters

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Experience in verification of coherent systems

Originally posted on Himalayas

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